Have you ever come across a situation where you have to connect a set of multi-bit wires with another set of multi-bit wires?
And I did not know how to connect them to each other. The problem was compounded by a requirement that one set of wires was named din<63:0> coming from one 64-bit input port. I had to connect this to a component in my schematic that had two 32-bit ports (D0 and D1). The wires had to alternate between these two ports. Thus din<63> was to be connected to D1<31>, din<62> to D0<31>, din<60> to D1<30> and so on.
I could not just short them together because then Virtuoso would complain. I spent two hours trying to figure out a solution and did not know what to search for on Google. That was until I came across the Virtuoso Schematic Composer user guide ( Yes! I should have looked at it first), that mentioned “patchcord” connections. So that is what it was called.
Went back to my schematic inserted the ‘patch’ cell from the ‘basic’ library and all done. This is what my schematic looks like now. The symbol that looks like a “patchcord” or a “jumper” is the patch…. of course.
But watch out, there is a catch.
Quoting fromAndrew Beckett’s answer on the Cadence Supportf forums at https://community.cadence.com/cadence_technology_forums/f/38/t/2792
You should be able to use patch from basic (or Add->Patchcord in the schematic editor) to alias nets. The patch component can alias both single (scalar) nets and bus/bundle (vector) nets. The one thing you can’t do is to alias two different terminals, two different global nets, or a terminal to a global net. For that, you can use the “cds_thru” component in basic. cds_thru ends up as something equivalent to a short in all the things it gets netlisted to – so for Verilog, it’s a true through connection (because you can do that in Verilog); for spectre it’s an “iprobe” (effectively a zero-volt source); for hspice it’s a zero-volt source; for VirtuosoXL it will get shorted by VXL because it has lxRemoveDevice on it; for CDL it ends up as a small resistor (which generally can be shorted by the physical verification tool); and for Diva it ends up as a component that can be removed using removeDevice() in your LVS rules.
That said, you should only use cds_thru for cases where patch can’t be used. patch is a direct alias in the database, so that’s better than introducing a real component in circuit simulators, say.
You can also use a single patchcord with a schematic patch expresssion “schPatchExpr”. The syntax for the same is
One needs to be careful with the nets that one is trying to connect through the patchcord connection. Quoting from the documentation
Only one of the nets can be connected to a schematic pin (I/O pin). Also, in the schematic editor, you cannot connect an input pin to an output pin even though you use a patchcord in the middle.
If you want to connect two pins together and rename them, the only way of doing this is to have a component in the way (such as basic/cds_thru, for example), You’d have to give the instance name of cds_thru I1<31:0> for example so that it has the same width as the bus. Note that cds_thru isn’t a true short – it’s designed for this kind of application though.
I learned it the hard way https://community.cadence.com/cadence_technology_forums/f/38/t/37566